An inter-integrated circuit (I2C) communication scheme using a serial bus is known. The I2C communication scheme is suitably used in a case in which a communication distance is short (for example, 1 m or less) and a communication speed is slow (for example, 100 kbps or 400 kbps) as in communication between a low-speed peripheral device and a motherboard, communication between devices on a common board, or the like. The I2C communication scheme is adopted in many systems due to its simple structure, low cost, ample track record, and the like. The I2C communication scheme may be referred to as a 2-wire serial interface.
When communication based on the I2C communication scheme is performed between two devices, one of the two devices is a master device and the other is a slave device. The master device and the slave device are connected by two bidirectional open drain signal lines (an SCL line and an SDA line) pulled up by a resistor, and communication between both of the devices is performed under an initiative of the master device. In the I2C communication scheme, a plurality of slave devices can be connected to one master device.
The master device sends a clock to the SCL line and also sends a write request signal together with an address and data to the SDA line such that data can be written to the slave device corresponding to the address. Further, the master device sends the clock to the SCL line and also sends a read request signal together with the address to the SDA line, such that data can be read from the slave device corresponding to the address. In this case, after the master device transmits the read request signal, the master device receives the data sent from the slave device. Hereinafter, the write request and the read request are collectively referred to as an access request.
When it takes time to perform a process based on the access request signal in the slave device, the slave device can cause the master device to wait before sending of the next access request signal to the slave device, by setting the SCL line to a low level. This is referred to as a clock-stretching. Since communication is possible even when a clock-stretching specification is not supported, not all I2C compliant devices supports the clock-stretching specification.
Since the I2C communication scheme uses an open drain signal line, the I2C communication scheme is not suitable for application to long-distance communication. In order to solve such a problem, Patent Literature 1 proposes applying the I2C communication scheme to long-distance communication by using clock-stretching. The transceiver system disclosed in Patent Literature 1 includes a host device, a host-side transceiver device, a remote-side transceiver device, and a remote device.
In this transceiver system, communication based on the I2C communication scheme is performed between the host device (master device) and the host-side transceiver device (slave device), communication based on a communication scheme (for example, a serial communication scheme using a differential signal line) different from the I2C communication scheme is performed between the host-side transceiver device and the remote-side transceiver device, and communication based on the I2C communication scheme is performed between the remote-side transceiver device (master device) and the remote device (slave device). By doing so, it is possible to transmit an access request signal from the host device to the remote device via the host-side transceiver device and the remote-side transceiver device. A communication distance between the host-side transceiver device and the remote-side transceiver device may be several meters to tens of meters.